Re: [Discuss-gnuradio] [GSoC19] Report of Verilog simulation evaluation 1

Hi Bowen,

I'm glad that the project is going well! Congratulations on your progress so far.

When do you expect to have a block with an AXI FIFO working? I think that will be a really useful point for more people to try running the code and see what it looks like to run just a simple "copy" example.

Regards,
Derek

On 01/07/2019 15:30, Bowen Hu wrote:

Hi all,

I am really glad that I passed the evaluation 1 this week. I could not achieve these things without the help of my mentor and community.

I just started working on the AXI-stream interface this week, it's a great idea that Sébastien gave me.

If you have any suggestions about my project, please feel free to tell me.

Best regards,

Bowen

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