Hi Ben,
Thanks for your reply.UHD Error:
The receive packet handler failed to time-align packets.
67936 received packets were processed by the handler.
However, a timestamp match could not be determined.
On Tue, Nov 26, 2013 at 5:05 AM, Ben Hilburn <ben.hilburn@ettus.com> wrote:
Hi LTP -If you modified the FPGA code for that channel, it is impossible for us to know how you might have changed things, and what the effect might be.If you post your modified code for others to review, we might be able to help you more. That said, we really can't support custom implementations, since it is your application.What led you to modify the code? Was there something about the stock images that didn't do something you needed?Cheers,Ben
----------------------------On Thu, Nov 21, 2013 at 5:40 PM, Luong Tan Phong <phonglt03@gmail.com> wrote:
_______________________________________________LTP.Best regards,Thanks so much.Could you tell me how to receive data from RX1, please?Hi Lists,I've modified RX1 channel on USRP N2xx FPGA sources, and data rate on RX1 is difference with RX0 (don't change RX0 channel because RX0 channel will be use for other task).
Any of your advice to help me would be greatly appreciated.
USRP-users mailing list
USRP-users@lists.ettus.com
http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
No comments:
Post a Comment