> Hi all
>
> Is it possible to disable the automatic DC offset removal control loop in
> the FPGA to measure DC? In old posts I found the function
> "set_dc_offset_cl_enable". But if I try that, this function can not be
> found.
>
> I use a USRP N210 with a LFRX board.
>
> my code:
> .....
> self.uhd_usrp_source_0 = uhd.usrp_source(
> device_addr="",
> stream_args=uhd.stream_args(
> cpu_format="fc32",
> channels=range(1),
> ),
> )
> .....
> self.uhd_usrp_source_0.set_dc_offset_cl_enable(0x0,0xF)
> .....
>
Can you give this a try?
http://gnuradio.org/cgit/gnuradio.git/tree/gr-uhd/include/gr_uhd_usrp_source.h#n254
Let me know if it works for you.
-josh
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