[Discuss-gnuradio] Building USRP2 FPGA on ISE 11.4

I was able to place and route the design on ISE 11.4 using a 'high' effort and ensuring that the speed grade selected is -5 (that really made a difference of about 20MHz in the speed of the final design). However, when it comes time to generate the bitstream, it complains about the -g Match_cycle:Auto  and insists on changing it to -g Match_cycle:NoWait, and then throws an error, with no information.

Does this ring a bell for anyone? I haven't seen it before.

Thanks,
TMB