> I do not understand what you mean by "proper" bandwidth. And what are these
> "proper" USRP2 `s bandwidth? Thanks anyway for your reply.
>
The allowable bandwidths for the USRP2 are in the range 100Msps /
([4...512]). The
FPGA *do not do* fractional interpolation/decimation. The rate that
is presented to the
USRP2 must be an integer fraction of the basic DAC/ADC rate.
It's also vastly preferable that the interpolation rate be even, and
it's better if it's
a multiple of 4.
--
Principal Investigator
Shirleys Bay Radio Astronomy Consortium
http://www.sbrac.org
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